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  • Question

  • An OR gate can be imagined as


  • Options
  • A. switches connected in series
  • B. switches connected in parallel
  • C. MOS transistors connected in series
  • D. All of the above
  • E. None of the above

  • Correct Answer
  • switches connected in parallel 

    • Digital Computer Electronics problems

    Search Results

    • 1. With a NAND latch a low R and a low S produce a _____ condition.

    • Options
    • A. race
    • B. set
    • C. reset
    • D. no change
    • E. None of the above
      • Discuss
    • 2. A _____ TTL device can sink up to 16mA and can source up to 400 MA.

    • Options
    • A. Low-power
    • B. high-power
    • C. Standard
    • D. Schottky
    • E. None of the above
      • Discuss
    • 3. Digital design often starts by constructing a _____ table.

    • Options
    • A. Standard
    • B. Two-stage
    • C. Truth
    • D. Two-dinensional
    • E. None of the above
      • Discuss
    • 4. An OR gate has 6 inputs. What is the only input word that produces a 0 output?

    • Options
    • A. 000000
    • B. 000111
    • C. 111000
    • D. 111111
    • E. None of the above
      • Discuss
    • 5. The functional difference between SR flip-flop and JK flip-flop is that

    • Options
    • A. JK flip-flop is faster than SR flip-flop
    • B. JK flip-flop has a feed back path
    • C. JK flip-flop accepts both inputs 1
    • D. JK flip-flop does not require external clock
    • E. None of the above
      • Discuss
    • 6. A positive AND gate is also a negative

    • Options
    • A. NAND gate
    • B. NOR gate
    • C. AND gate
    • D. OR gate
    • E. None of the above
      • Discuss
    • 7. How many inputs signals can a gate have?

    • Options
    • A. one
    • B. more than one
    • C. two only
    • D. both (a) and (b)
    • E. None of the above
      • Discuss
    • 8. Conversion of decimal number 6710 to it's octal number equivalent is

    • Options
    • A. 1008
    • B. 1038
    • C. 1098
    • D. 998
    • E. None of the above
      • Discuss
    • 9. The time required for a pulse to decrease from 90 to 10 percent of its maximum value is known as

    • Options
    • A. rise time
    • B. decay time
    • C. binary level transition period
    • D. propagation delay
    • E. None of the above
      • Discuss
    • 10. Which of the following flip-flops is free from race around problem?

    • Options
    • A. T flip-flop
    • B. SR flip-flop
    • C. master slave JK flip-flop
    • D. All of the above
    • E. None of the above
      • Discuss

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