Where does CPU Enhanced mode originate from?

Correct Answer: To clear the CMOS password you just remove the CMOS Battery or else you can also use a jumper settings

Correct Answer: Suppose your flip-flop is positive edgetriggered time for which data should be stable prior to positive edge clock is called setup is called setup time constraint Time for which data should be stable after the positive edge of clock is called as hold time constraint If any of these constraints are violate d then flip-flop will enter in meta stable state, in which we cannot determine the output of flip-flop there are two equation: 1 Tcq + Tcomb > Tskew + Thold 2 Tcq + Tcomb > Tskew + T - Tsetup Tcq is time delay when data enters the flip flop and data comes at output of flip flop Tcomb is the logic delay between two flip flop Tskew is the delay of clock to flip flop: suppose there are two flip flop, if clock reaches first to source flip flop and then after some delay to destination flip flop, it is positive skew and if vice versa then negative skew so if you take 2 eq you will see that setup time is the determining factor of clock's time period

Correct Answer: One way is shorting the two inputs of the NAND gate and passing the input truth table: A B output 1 1 0 0 0 1 The second way is passing the input to only one input (say A) of the NAND gate Since the other input (say B is floating, it is always logic one Truth table: A B output 1 1 0 0 1 1

Correct Answer: SIM is Set Interrupt Mask Used to mask the hardware interrupts RIM is Read Interrupt Mask Used to check whether the interrupt is Masked or not

Correct Answer: Code, Data, Stack, Extra Segment registers in 8086

Correct Answer: Microprocessor contain ROM chip beacause it contain instructions to execute data It contain the monitor program which not only include execution instruction but also interfacing program

Correct Answer: ROM cannot be used as stack because it is not possible to write to ROM

Correct Answer: RAM: Read / Write memory, High Speed, Volatile Memory ROM: Read only memory, low speed, non volite memory

Correct Answer: Cache Memory is scratch pad of computer

Correct Answer: Static RAM: no refreshing, 6 to 8 MOS transistors are required to form one memory cell, information stored as voltage level in flip flop Dynamic RAM: refreshed periodically, 3 to 4 transistors are required to form one memory cell, information is stored as a charge in the gate to substrate capacitance