What is the Maximum clock frequency in 8086?

Correct Answer: High-end: Intel - Pentium (II, III, 4) AMD - Athlon Low-end: Intel - Celeron, AMD - Duron 64-bit: Intel - Itanium 2, AMD - Opteron

Correct Answer: Program counter holds the address of either the first byte of the next instruction to be fetched for execution of the address of the next byte of a multi byte instruction, which has not been completely fetched In both the cases it gets incremented automatically one by one as the instruction bytes get fetched Also Program register keeps the address of the next instruction

Correct Answer: Flag is called as Low order rigister & Accumulator is called as High order Rigister

Correct Answer: Microprocessor is a program-controlled device, which fetches the instructions from memory decodes and executes the instructions Most Micro Processors are single-chip devices

Correct Answer: 32 bits

Explanation:

IPV4 Internet Protocol Version 4 has 32 bits of address.

Correct Answer: Code, Data, Stack, Extra Segment registers in 8086

Correct Answer: SIM is Set Interrupt Mask Used to mask the hardware interrupts RIM is Read Interrupt Mask Used to check whether the interrupt is Masked or not

Correct Answer: One way is shorting the two inputs of the NAND gate and passing the input truth table: A B output 1 1 0 0 0 1 The second way is passing the input to only one input (say A) of the NAND gate Since the other input (say B is floating, it is always logic one Truth table: A B output 1 1 0 0 1 1

Correct Answer: Suppose your flip-flop is positive edgetriggered time for which data should be stable prior to positive edge clock is called setup is called setup time constraint Time for which data should be stable after the positive edge of clock is called as hold time constraint If any of these constraints are violate d then flip-flop will enter in meta stable state, in which we cannot determine the output of flip-flop there are two equation: 1 Tcq + Tcomb > Tskew + Thold 2 Tcq + Tcomb > Tskew + T - Tsetup Tcq is time delay when data enters the flip flop and data comes at output of flip flop Tcomb is the logic delay between two flip flop Tskew is the delay of clock to flip flop: suppose there are two flip flop, if clock reaches first to source flip flop and then after some delay to destination flip flop, it is positive skew and if vice versa then negative skew so if you take 2 eq you will see that setup time is the determining factor of clock's time period

Correct Answer: To clear the CMOS password you just remove the CMOS Battery or else you can also use a jumper settings