What is 1st / 2nd / 3rd / 4th generation processor?

Correct Answer: All x86 processors have pipelined structure

Correct Answer: 8085 is a one address microprocessor In 8085 interrupts are classified by software and hardware interrupts

Correct Answer: The MESI protocol is also known as illinois protocol due to its development the University of illinois at Urbana-Champaign and MESI is a widely used cache coherency and memory coherence protocol MESI is the most common which supports write-back cache its use in personal computers became widespread with the introduction of intel's pentium processor to "support the more efficient write-back cache in addition to the write-through cache previously used by the Intel 486 processor"/

Correct Answer: Because 8085 processor is 8 bit ALU (arithmetic logic review) Similarly 8086 processor has 16 bit ALU

Correct Answer: The Transmission-Gate's input is connected to the D_LATCH data input (D), the control input to the Transmission-Gate is connected to the D-Latch enable inputs (EN) and the Transmission-Gate outputs is the D_LATCH output(Q)

Correct Answer: The original 8086, which only had 1 MB of memory This megabyte is split into low memory for IRQ tables, application memory and high memory

Correct Answer: Because there is no need address traansaction between processor and peripheral device but data bus is needed because data has to be read and write

Correct Answer: TST 75 is a raising edge-triggering interrupt

Correct Answer: Stack pointer and Program counter all have 16 bits

Correct Answer: 8-bit processor - 8085/Z80/6800; 16-bit processor - 8086/68000/Z8000; 32-bit processor - 80386/80486