Draw a Transmission Gate-based D-Latch?

Correct Answer: There are situations, called hazards, that prevent the next insturction in the instruction stream from executing during its designated clock cycle hazards reduce the performance from the ideal speedup gained by pipelining There are three classes of Hazards: 1 Structural hazards: It arise from resource conficts when the hardware cannot support all possible combinations of instructions simultaniously in overlapped execution 2 Data Hazards: It arise when an instruction depends on the results of previous instruction in a way that is exposed by the overlapping of instructions in the pipeline 3control hazards it arise from the pipelining of branches and other instructions that chage the PC

Correct Answer: Maximum of 24 logical drives The extended partition can only have 23 logical drives

Correct Answer: the processing speed depends on DATA BUS WIDTH

Correct Answer: Both A & B

Correct Answer: Relationships

Correct Answer: Because 8085 processor is 8 bit ALU (arithmetic logic review) Similarly 8086 processor has 16 bit ALU

Correct Answer: The MESI protocol is also known as illinois protocol due to its development the University of illinois at Urbana-Champaign and MESI is a widely used cache coherency and memory coherence protocol MESI is the most common which supports write-back cache its use in personal computers became widespread with the introduction of intel's pentium processor to "support the more efficient write-back cache in addition to the write-through cache previously used by the Intel 486 processor"/

Correct Answer: 8085 is a one address microprocessor In 8085 interrupts are classified by software and hardware interrupts

Correct Answer: All x86 processors have pipelined structure

Correct Answer: The processor made of PMOS / NMOS / HMOS / HCMOS technology is called 1st / 2nd / 3rd / 4th generation processor, and it is made up of 4 / 8 / 16 / 32 bits